SkyWater and Stanford build a monolithic 3D chip to smash the AI memory wall
Engineers from Stanford, CMU, Penn, and MIT just teamed up with SkyWater Technology to build the first U.S.-made monolithic 3D chip in a commercial foundry. By vertically stacking logic and memory with dense wiring, it bypasses the dreaded "memory wall," boosting speeds up to 12x on Meta's LLaMA workloads. Why it matters: It proves next-gen 3D chip architectures can actually be produced in domestic fabs rather than just cleanrooms.

The single biggest bottleneck in modern AI is not raw compute. It is the commute.
Running models like ChatGPT or Claude requires shuffling mountains of data between memory and processors across long, flat pathways on conventional 2D chips. When processors finish computing faster than data can arrive, you hit the dreaded "memory wall."
Now, engineers from Stanford, CMU, Penn, and MIT have teamed up with Minnesota-based SkyWater Technology to build the first monolithic 3D chip ever fabricated in a U.S. commercial foundry, as presented at the 71st IEEE International Electron Devices Meeting.
Building a Manhattan for processors
Most existing attempts at 3D chips stack separate finished chips together like a layer cake. That approach works, but the connections between layers are coarse and sparse, creating new bottlenecks.
The research team took a different route called monolithic integration. Instead of gluing chips together, they fabricate each microscopic layer directly on top of the last in a continuous, low-temperature process so the bottom layers are not damaged.
This method allows for the highest density of vertical chip wiring achieved to date. Robert M. Radway, a co-author and assistant professor at Penn, described it as building the Manhattan of computing. Rather than spreading processors and memory out into the suburbs, you house them inside a skyscraper with rapid elevator banks.
Up to 12x gains on real AI models
Early hardware tests show the physical prototype already beats comparable 2D chips by about 4x. In simulations of taller designs packing more stacked tiers, performance jumped up to 12x on real-world AI workloads derived from Meta's LLaMA model.
Even more promising is energy efficiency. The researchers estimate the architecture opens a realistic path to a 100- to 1,000-fold improvement in energy-delay product (EDP), which measures the balance between speed and power consumption.
The manufacturing milestone is just as critical. Fabricated entirely at SkyWater’s Bloomington foundry, the project proves that monolithic 3D designs can actually be made in commercial domestic fabs rather than remaining isolated academic experiments.
Why it matters
As standard transistor shrinking grinds against physical limits, the AI boom is desperately hungry for new hardware paradigms. Today, chip giants like Nvidia lean heavily on advanced packaging like TSMC's CoWoS to squeeze memory closer to compute, but that process remains expensive and capacity-constrained.
We think this monolithic 3D approach is particularly clever because it bypasses the need for exotic packaging steps by growing memory and logic directly together. If scaled, it could eventually offer a practical way to run edge AI and dense models on local hardware without frying the power budget.
However, it is worth keeping expectations grounded. The team still has to prove real-world yields and solve the brutal heat dissipation challenges that come with cramming multiple computing tiers into a tiny vertical footprint. But by producing working silicon inside a commercial U.S. foundry, they have turned an academic dream into an engineering race worth watching.
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